Design-Reuse4y
A 180nm Flip-Chip IO library with 1.2-1.8V GPIO, 1.8V & 5V analog/RF, 20-36V ultra-low leakage low-cap HV analog and OTP program cell
ESD protection cells for IO and core supplies are constructed in an efficient 60um x 80um footprint. The analog suite includes 1.8V and 5V low-cap analog / RF cells, a 7.5V OTP programming cell, and ...
Design-Reuse4y
A 130nm Wirebond IO library with 3.3V GPIO, LVDS TX & RX, 3.3V I2C open-drain, analog cell and OTP program cell
ESD protection for IO and core supplies is constructed in an aggressive footprint. 3.3V LVDS TX & RX cells, along with 3.3V OTP programming, 3.3V I2C open drain and analog cells complement the GPIO ...